Gain further experience mixing design-entry methods and hierarchical design.
Parts:
PC running Quartus II
Altera DE2 Board
Procedure (do as much before lab as possible):
Part 1: Full-adder
Specification: Design a 1-bit Full-adder circuit with three inputs x, y, and cin, and two outputs s and cout.
Define Inputs and Outputs: Draw a block diagram for the circuit showing the inputs
and outputs.
Create Truth-tables: Generate a truth-table that shows both outputs for the three
inputs.
Derive Simplified Logic Expressions: Determine the minimal expression for each output.
Create Verilog Code: Using the New Project Wizard, specify (create) the working directory for this lab (you could name the directory
lab06) and name this project FullAdder. Create a Verilog HDL File and write the Verilog code that implements the minimal
expressions. Save the file with the name FullAdder.v. Paste a copy of your valid code in your lab book.
Functional Simulation: Perform a functional simulation of the circuit. Paste the results
in your lab book.
Create Symbol: Create a symbol for the full adder to use in the graphical editor by
selecting the Create/Update>Create Symbol Files for Current File option under the File menu. This creates a symbol file that is a Graphic File and can be viewed and edited
by opening it.
Part 2: 4-bit Adder
Specification: Design a 4-bit Adder with nine inputs, x3, x2, x1, x0, y3, y2, y1, y0, and cin and five outputs, cout, s3, s2, s1, and s0, by cascading four 1-bit Full-adders.
Define Inputs and Outputs: Draw a block diagram of the circuit showing the inputs
and outputs for the circuit.
Draw Logic Circuit: Using the New Project Wizard, specify the working directory as the same working directory as in part 1 above and
name this project Adder4bit. Create a Block Diagram/Schematic File produce a 4-bit adder circuit by cascading
four 1-bit full adder modules created in part 1. Use the symbol for the full adder
you created. Save this schematic file with the name Adder4bit.bdf. Paste a copy of your valid schematic in your lab book.
Functional Simulation: Perform a functional simulation of the circuit. Paste the results
in your lab book.
Implement: Make appropriate pin assignments so that input comes from the toggle switches
and output goes to any five user-controllable LEDs. Paste/record the pin assignments
in your lab book. Compile the circuit for the Cyclone II FPGA on the DE2 Board (Users Guide). Paste the fitter summary from the report file in your lab book.
Timing Simulation: Perform a timing simulation of your implemented circuit. Paste
and record the appropriate results in your lab book.
Part 3: Download
Download: Download the 4-bit adder circuit into the Cyclone II FPGA on the DE2 board.
Test: Test the circuit. You do not need to try all 512 possible input combinations.
Record your results in you lab book.
